1. Field of the Invention
The present invention relates to a method of forming a thin-film semiconductor crystal by forming a thin film of amorphous silicon, doping a selected region of the thin film of amorphous silicon with ions by way of ion implantation, and thereafter growing a single semiconductor crystal by way of low-temperature solid-phase growth, and a semiconductor device with such a thin-film semiconductor crystal.
2. Description of the Related Art
Static random-access memories (SRAMs) of the high-resistance-load type fabricated using a semiconductor film deposited on a substrate comprise load-type memory cells that are fabricated of a polycrystalline semiconductor, i.e., polycrystalline silicon. However, it is difficult for the SRAMs of the high-resistance-load type to maintain sufficient levels of operating margin, reliability, standby current.
To solve the above problem, there has been proposed a laminated SRAM using, as load elements, thin-film transistors formed in a polycrystalline semiconductor of highly uniform film qualities, e.g., polycrystalline silicon.
Thin-film transistors find use as image element drivers in liquid crystal display units, for example.
Polycrystalline silicon contains dangling bonds at a higher density than single-crystal silicon which are responsible for a leak current at the time the transistor is turned off and for a low operating speed at the time the transistor is turned off.
One way of reducing such dangling bonds is to dope the polycrystalline silicon with hydrogen for coupling the dangling bonds with hydrogen atoms. It is important to grow polycrystalline silicon with good film qualities having few crystal defects for improved characteristics.
There have generally been proposed chemical vapor deposition (CVD), solid-phase crystal growth (SPC), etc. for growing polycrystalline silicon.
The solid-phase crystal growth process allows fabrication of a polycrystalline semiconductor film of a large grain size of 1 .mu.m or greater. If a thin-film transistor is formed on such a large crystal grain, then it possible that it has a large current driving capability with a low current leakage.
However, since the position of the crystal grain grown by the solid-phase crystal growth process is at random, the channel of the resultant thin-film transistor contains a grain boundary. Therefore, the current leakage may not be lowered and the current driving capability may not be increased, resulting in large variations of characteristics.
As a solution to the above problem, there has been proposed a crystal growth process capable of growing a crystal grain in a certain selected position (see, for example, H. Mumomi, et al. "Control of Grain-Location in Solid State Crystallization of Si", Extended Abstracts of the 22nd (1990 International) Conference on Solid State Devices and Materials, Sendai, 1990, pp 1159-1160, and Japanese laid-open patent publication No. 3-12542).
One conventional process will be described below with reference to FIGS. 1A through 1C of the accompanying drawings. As shown in FIG. 1A, a thin film 2 of polycrystalline silicon is deposited on a substrate 1 such as an SiO.sub.2 layer using SiH.sub.4 by low-pressure (LP) CVD, and then silicon ions are introduced at a low dose of 1.times.10.sup.14 cm.sup.-2 at 40 KeV, for example, into the entire surface of the thin film 2 of polycrystalline silicon by ion implantation.
Thereafter, as shown in FIG. 1B, a mask 3 of a photoresist is formed selectively on the thin film 2 of polycrystalline silicon in regions where a single crystal is to be formed, by photolithography. Then, silicon ions are introduced at a high dose of 1.times.10.sup.15 cm.sup.-2 at 40 KeV, for example, into the exposed or unmasked regions of the thin film 2 of polycrystalline silicon by ion implantation.
Subsequently, as shown in FIG. 1C, the mask 3 is removed, and the assembly is annealed for low-temperature solid-phase crystal growth. Crystal growth is now started in the thin film 2 of polycrystalline silicon from the regions where the ion concentration is lower, i.e., which were masked by the mask 3, forming a thin-film single semiconductor crystal 4 with grain boundaries 7. In this manner, the single semiconductor crystal can grown in a predetermined position.
The above crystal growth is based on the difference between incubation times for the generation of crystal nuclei due to different concentration of implanted ions (see, for example, J. Electrochem. Soc., SOLID-STATE SCIENCE AND TECHNOLOGY, July 1987, p 1775, FIG. 5). Since the incubation time for the generation of crystal nuclei in regions of a lower ion concentration is shorter than the incubation time for the generation of crystal nuclei in regions of a higher ion concentration, crystal nuclei are produced in the regions of a lower ion concentration, and the crystal starts growing from those crystal nuclei.
According to the above process, inasmuch as a thin-film single semiconductor crystal with a single crystal grain is formed in a determined position, a thin-film transistor fabricated in that position has its channel positioned out of the grain boundary. Therefore, the thin-film transistor thus fabricated has good characteristics.
However, the above process of forming a thin-film single semiconductor crystal requires a long processing time and a complex operation because it involves at least two ion implantation steps that are time-consuming and complicated.